Name Description Size Coverage
xsimd_all_registers.hpp 1900 -
xsimd_api.hpp high level free functions @defgroup batch_arithmetic Arithmetic operators @defgroup batch_constant Constant batches @defgroup batch_cond Conditional operators @defgroup batch_data_transfer Memory operators @defgroup batch_math Basic math operators @defgroup batch_math_extra Extra math operators @defgroup batch_fp Floating point manipulation @defgroup batch_rounding Rounding operators @defgroup batch_conversion Conversion operators @defgroup batch_complex Complex operators @defgroup batch_logical Logical operators @defgroup batch_bitwise Bitwise operators @defgroup batch_reducers Reducers @defgroup batch_miscellaneous Miscellaneous @defgroup batch_trigo Trigonometry @defgroup batch_bool_logical Boolean logical operators @defgroup batch_bool_reducers Boolean reducers 91528 70 %
xsimd_avx_register.hpp @ingroup architectures AVX instructions 2405 25 %
xsimd_avx2_register.hpp @ingroup architectures AVX2 instructions 1441 100 %
xsimd_avx512bw_register.hpp @ingroup architectures AVX512BW instructions 1658 100 %
xsimd_avx512cd_register.hpp @ingroup architectures AVX512CD instructions 1653 100 %
xsimd_avx512dq_register.hpp @ingroup architectures AVX512DQ instructions 1658 100 %
xsimd_avx512er_register.hpp @ingroup architectures AVX512ER instructions 1658 -
xsimd_avx512f_register.hpp @ingroup architectures AVX512F instructions 3144 100 %
xsimd_avx512ifma_register.hpp @ingroup architectures AVX512IFMA instructions 1678 -
xsimd_avx512pf_register.hpp @ingroup architectures AVX512BW instructions 1658 -
xsimd_avx512vbmi_register.hpp @ingroup architectures AVX512VBMI instructions 1688 -
xsimd_avx512vnni_avx512bw_register.hpp @ingroup architectures AVX512VNNI instructions 1830 100 %
xsimd_avx512vnni_avx512vbmi_register.hpp @ingroup architectures AVX512VNNI instructions 1858 -
xsimd_avx512vnni_register.hpp @ingroup architectures AVX512VNNI instructions 1676 -
xsimd_avxvnni_register.hpp @ingroup architectures AVXVNNI instructions 1473 0 %
xsimd_batch.hpp Shorthand for xsimd::mod() 54390 92 %
xsimd_batch_constant.hpp @brief batch of boolean constant Abstract representation of a batch of boolean constants. @tparam batch_type the type of the associated batch values. @tparam Values boolean constant represented by this batch 11412 100 %
xsimd_emulated_register.hpp @ingroup architectures emulated instructions 2960 -
xsimd_fma3_avx_register.hpp @ingroup architectures AVX + FMA instructions 1545 -
xsimd_fma3_avx2_register.hpp @ingroup architectures AVX2 + FMA instructions 1559 -
xsimd_fma3_sse_register.hpp @ingroup architectures SSE4.2 + FMA instructions 1575 0 %
xsimd_fma4_register.hpp @ingroup architectures SSE4.2 + FMA4 instructions 1518 -
xsimd_generic_arch.hpp @defgroup architectures Architecture description 1841 -
xsimd_i8mm_neon64_register.hpp @ingroup architectures Neon64 + i8mm instructions 1754 -
xsimd_neon_register.hpp @ingroup architectures NEON instructions for arm32 5617 -
xsimd_neon64_register.hpp @ingroup architectures NEON instructions for arm64 1847 -
xsimd_register.hpp 4204 -
xsimd_rvv_register.hpp @ingroup architectures RVV instructions (fixed vector size) for riscv 23355 -
xsimd_sse2_register.hpp @ingroup architectures SSE2 instructions 2397 38 %
xsimd_sse3_register.hpp @ingroup architectures SSE3 instructions 1498 0 %
xsimd_sse4_1_register.hpp @ingroup architectures SSE4.1 instructions 1522 0 %
xsimd_sse4_2_register.hpp @ingroup architectures SSE4.2 instructions 1527 0 %
xsimd_ssse3_register.hpp @ingroup architectures SSSE3 instructions 1507 0 %
xsimd_sve_register.hpp @ingroup architectures SVE instructions (fixed vector size) for arm64 6736 -
xsimd_traits.hpp high level type traits @defgroup batch_traits Type traits 9847 100 %
xsimd_utils.hpp index * ************ 15882 -
xsimd_wasm_register.hpp @ingroup architectures WASM instructions 2439 -